PIPER: Pulse Input/Period [FC102]

PIPER: Pulse Input/Period [FC102]

Specifications

Spec Description
S1Expander bus slave address of IMDSM04
S2Selected channel (1-8)
S3
Pulse trigger transition:
0 = low to high
1 = high to low
S4Expected period range (see below)
S5Gain
S6High alarm
S7Low alarm
S8Spare

Format for S4

Expected Period Range

10.1msecs - 6.553secs, ± 0.1msecs
21.0msecs - 65.53secs, ± 1.0msecs
310.0msecs - 655.3secs, ± 10.0msecs
40.1secs - 6.553ksecs, ± 0.1secs
51.0secs - 65.53ksecs, ± 1.0secs
610.0secs - 1655.3ksecs, ± 10.0secs

Outputs

Block Type Description
N Real Period (seconds) multiplied by gain
N+1 Bit Period high alarm
N+2 Bit Period low alarm
N+3 Bit Good/bad communication status